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Special Session 6
Future Circuits and Systems based on Emerging Memory Technologies
  • Chair: Weisheng Zhao, Beihang University, China
    Co-chair: Wang Kang, Beihang University, China

  • Prof. Weisheng ZHAO -- received the Ph.D degree in microelectronics from the University of Paris-Sud, France in 2007. Since 2009, he joined the CNRS as a tenured research scientist and his interest includes the hybrid integration of nano- devices with CMOS circuit and non-volatile memory like MRAM circuit and architecture design.  From 2014, he becomes a professor and director at Fert Beijing Research Institute, Beihang University. He has authored or co-authored more than 300 scientific papers (e.g. Nature Communications, Proceedings of the IEEE, IEEE TCAS, IEEE TED et.) and 60 patents, in 2017 he received the Guillemin-Cauer award from IEEE CAS society. He has served as associated editors of IEEE Transactions on Nanotechnology, IEEE Transactions on Circuits and Systems I: Regular Papers, Electronics Letters and Scientific reports, and TPC member of DATE 2017, Intermag 2017, Nanoarch2017 and GLSVLSI 2017 etc.

    Prof. Wang Kang -- received the B.S. degree in Electronic and Information Engineering from Beihang University, Beijing, China, in 2009. He received the double Ph.D. degrees in Microelectronics from Beihang University, Beijing, China, and in Physics from Univ. Pars-Sud, Paris, France, in 2014, respectively. He is now an Associate Professor in Beihang University, Beijing, China. He has been working on spintronic devices, circuits, architectures, and applications over ten years. He has authored or co-authored 2 book chapters, and more than 90 technical papers in leading journals and conferences, such as Proceedings of the IEEE, Nature Comm., IEEE Trans. Electron Device, IEEE Electron Device, Lett., IEEE Trans. Circ. Syst. I: Reg. Papers, IEEE Trans. Computers, etc. He also holds 15 Chinese patents. He severed as  a  reviewer  for  dozens  of  IEEE  transactions  and  international  conferences.  He  severed  as  a  guest  editor  of Microelectronics Journal.

  • Topic:
    With the end of Moore’s law in sight, the semiconductor industry has been in a ‘the King is dying’ phase owing to the “power wall” issue. Meanwhile, the “memory wall” in typical von-Neumann computing architecture accelerates the power wall issue due to the separation of the processor and memory (or refer to “von-Neumann bottleneck”). Many emerging memory technologies, especially nonvolatile memory technologies, such as MRAM and RRAM, etc., are looking into fill the ensuing power vacuum and bringing new innovation for future circuits and systems. This session aims to bring together the worldwide leading experts related to this topic to share recent results on “Future Circuits and Systems based on Emerging Memory Technologies”. We believe attendees from different fields will benefit from this special session.