Topic: General Design Flows and Examples of High-Speed SAR Type ADCs
Abstract: This tutorial will address the comprehensive top-to-bottom design methodologies and considerations for modern High Performance ADCs in Nano CMOS. It is divided into two sub- sessions to introduce the practical design methodologies, considerations with multiple examples for ADC designs. In the first session, the SAR-SAR sub-ranging ADC architecture’s general design flows and considerations based on noise budget will be discussed. The session two covers another design example of Multi-bit SAR ADC. Some design issues of different comparator architectures, offset calibrations and comparator metastability will be introduced.
After this two-half day tutorial, the audiences will get the general design knowledge of how to design a SAR based ADC and will be able to understand the key driving forces for the latest developments and most important design considerations and techniques for high speed SAR type ADCs.
Yan Zhu, University of Macau, China
Yan Zhu (诸嫣) (S’10- M’17) received the B.Sc. degree in electrical engineering and automation from Shanghai University, Shanghai, China, in 2006, and the M.Sc. and Ph.D. degrees in electrical and electronics engineering from the University of Macau Macao, China, in 2009 and 2011, respectively. She is now an assistant professor with the State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macao, China. She received Best Paper award in ESSCIRC 2014, the Student Design Contest award in A-SSCC 2011, the Chipidea Microelectronics Prize and Macao Scientific and Technological R&D Awards in 2012, 2014 and 2016 for outstanding Academic and Research achievements in Microelectronics. She has published more than 50 technical journals and conference papers in her field of interests, and holds 3 US patents. Her research interests include low-power and wideband high-speed Nyquist A/D converters as well as digitally assisted data converter designs.
Chi Hang Chan, University of Macau, China
Chi-Hang Chan (S'12 M'15) was born in Macau S.A.R., China, in 1985. He received the B.S. degree in electrical engineering from University of Washington (U.W. Seattle), USA, in 2008, the M.S. and Ph.D. degree from the University of Macau, Macao, China, in 2012 and 2015, respectively, where he currently serves as assistant professor. He was an intern with Chipidea Microelectronics (Now Synopsys), Macau, during his undergraduate studies. He received the Chipidea Microelectronics Prize and Macau Science and Technology Development Fund (FDCT) Postgraduates Award (Master Level) in 2012 and 2011, respectively. He also received Macau FDCT Award for Technological Invention (2nd class) as well as Macao Scientific and Technological R&D for Postgraduates Award (Ph.D. Level) in 2014 for outstanding Academic and Research achievements in Microelectronics. He is the recipient of the 2015 Solid-State-Circuit-Society (SSCS) Pre-doctoral Achievement Award. He also is the co-recipient of the 2011 ISSCC Silk Road Award and Student Design Contest Award in A-SSCC 2011. His research interests include Nyquist ADC and mixed signal circuits. Currently, his research mainly focuses on the comparator offset calibration, Flash and Multi-bit SAR ADC.
Topic: Self-Powered and Energy-Autonomous CMOS biomedical IoT design for personalized health care systems
Abstract: CMOS Biosensor is promising enabler for next-generation biomedical IoTs for personalized health care systems. This tutorial introduces CMOS biomedical IoT design from fundamental to state-of-the-art.
First, the tutorial introduces the fundamental of CMOS biosensors. Operational mechanism and applications of each types of CMOS biosensors such as potentiometric, amperometric, impedimetric, and ISFET are summarized.
Latter part introduces development of energy-autonomous biomedical IoTs. Ensuring stable energy is one of the most important current challenges in wearable and implantable biomedical systems. For addressing this issue, many developments with respect to batteries, wireless power delivery, and energy harvesting have been reported. One of the promising candidates is bio fuel cell. In this tutorial, the fundamental and forecast of the bio-fuel-cell-operated biosensing systems. Firstly, I will summary the fundamental basics of bio fuel cell including operation mechanism, its performance, and its advantages/disadvantages. Secondary, I will introduce the examples of the bio-fuel-cell-operated biosensing systems. Thirdly, I will introduce the supply-sensing architecture presented in BioCAS 2015/2016 from our group. The supply-sensing architecture uses bio-fuel cells as both power source and sensing converter. In addition, I will plan to present the latest result on the work on Glucose-fuel-cell-operated Glucose sensing system which can be applied to self-powered continuous Glucose monitoring system (CGMS). The tutorial will conclude with a discussion of recent work and future applications on the bio-fuel-cell-operated biosensing systems.
Kiichi Niitsu, Nagoya University, Nagoya, Japan
Kiichi Niitsu (S'05-M'10) was born in Japan, in 1983. He received the B.S. degree summa cum laude, M.S. and Ph.D. degrees in electrical engineering from Keio University, Yokohama, Japan, in 2006, 2008, and 2010, respectively. From 2010, he was an Assistant Professor at Gunma University, Kiryu, Japan. From 2012, he was a Lecturer at Nagoya University, Nagoya, Japan. Since 2016, he is currently an Associate Professor at Nagoya University, Nagoya, Japan. Since 2015, he serves concurrently as Precursory Research for Embryonic Science and Technology (PRESTO) researcher, Japan Science and Technology Agency (JST). His current research interest lies in the low-power and high-speed technologies of analog and digital VLSI circuits for biomedical application.
From 2008 to 2010, Dr. Niitsu was a Research Fellow of the Japan Society for the Promotion of Science (JSPS), a Research Assistant of the Global Center of Excellence (GCOE) Program at Keio University and a Collaboration Researcher of the Keio Advanced Research Center (KARC).
He was awarded the 2006 KEIO KOUGAKUKAI Award, the 2007 INOSE Science Promotion Award, the 2008 IEEE SSCS Japan Chapter Young Researcher Award and the 2009 IEEE SSCS Japan Chapter Academic Research Award both from IEEE Solid-State Circuits Society Japan Chapter, the 2008 FUJIWARA Award from the FUJIWARA foundation, 2011 YASUJIRO NIWA Outstanding Paper Award, 2011 FUNAI Research Promotion Award, 2011 Ando Incentive Prize for the Study of Electronics, 2011 Ericsson Young Scientist Award, 2012 ASP-DAC University LSI Design Contest Design Award, NF Foundation R&D Encouragement Award, AKASAKI Award from Nagoya University, IEEE Nagoya Section Young Researcher Award, IEEE Biomedical Circuits and Systems Conference 2016 (BioCAS 2016) Best Paper Award, and the 2017 Commendation for Science and Technology by the Minister of Education, Culture, Sports, Science and Technology, the Young Scientists' Prize.
He has published 54 referred original journal papers, 114 international conference papers, and 3 book chapters including 3 TBioCAS, 1 TCAS-I, 1 TCAS-II, 5 JSSC, 5 TVLSI, 9 BioCAS, 1 ISCAS, 2 ICECS, 7 APCCAS, 2 ISSCC, 4 Symp. on VLSI Circuits, 4 A-SSCC. He served as a technical committee of IEEE biomedical circuits and systems (BioCAS TC), a Review Committee Member of ISCAS 2017/2018, a Technical Program Committee of ICECS 2018, a Review Committee Member of APCCAS 2014, an editorial committee of IEICE Transactions on Electronics, Special Section on Analog Circuits and Related SoC Integration Technologies, and an editorial committee of IEICE ESS Fundamental Review. He is a member of IEEE, IEICE (the Institute of Electronics, Information and Communication Engineers of Japan), and JSAP (the Japan Society of Applied Physics).
Topic: Internet of Things (IoT): Circuits, Architectures,
Systems, and Demonstration
Abstract: Internet of Things (IoT) is the network of physical objects or "things" embedded with electronics, software, sensors, and network connectively. It enables the objects to collect, share, and analyze data. The IoT has become an integral part of our daily lives through applications such as public safety, intelligent tracking in transportation, industrial wireless automation, personal health monitoring, and health care for the aged community. IoT is one of the latest technology that will change our lifestyle in coming years. Experts estimate that as of now, there are 25 billon connected devices, and by 2020 it would reach to 50 billion devices. This tutorial aims to introduce the design and implementation of IoT systems. The foundations of IoT will be discussed throughout real applications. Challenges and constrains for the future research in IoT will be discussed. In addition, research opportunities and collaboration will be offered for the attendees.
Ahmed Abdelgawad, Central Michigan University, USA
Dr. Ahmed Abdelgawad received his M.S. and Ph.D. degree in Computer Engineering from University of Louisiana at Lafayette in 2007 and 2011 and subsequently joined IBM as a Design Aids & Automation Engineering Professional at Semiconductor Research and Development Center. In Fall 2012 he joined Central Michigan University as a Computer Engineering Assistant Professor. In Fall 2017, Dr. Abdelgawad was early promoted as a Computer Engineering Associate Professor. His area of expertise is distributed computing for Wireless Sensor Network (WSN), Internet of Things (IoT), Structural Health Monitoring (SHM), data fusion techniques for WSN, low power embedded system, video processing, digital signal processing, Robotics, RFID, Localization, VLSI, and FPGA design. He has published two books and more than 65 articles in related journals and conferences. Dr. Abdelgawad served as a reviewer for several conferences and journals, including IEEE WF-IoT, IEEE ISCAS, IEEE SAS, Springer, Elsevier, IEEE Transactions on VLSI, and IEEE Transactions on I&M. He severed in the technical committees of IEEE ISCAS 2007, IEEE ISCAS 2008, and IEEE ICIP 2009 conferences. He served in the administration committee of IEEE SiPS 2011. Dr. Abdelgawad has been appointed as a Track Chair of the International Conference on Cognitive and Sensor Networks (MIC-CSN 2013). He also served in the organizing committee of ICECS2013 and 2015 IEEE ICECS2015. Dr. Abdelgawad is the publicity chair in North America of the IEEE WF-IoT 2016/18 conferences. He is the finance chair of the IEEE ICASSP 2017. He is the TPC Co– Chair of IoT International Innovation Conference 2017 (I3C'17), the TPC Co– Chair of Global Internet of Things Summit (GIoTS 2017), and the technical program chair of IEEE MWSCAS 2018. He is currently the IEEE Northeast Michigan section chair and IEEE SPS Internet of Things (IoT) SIG Member. In addition, Dr. Abdelgawad served as a PI and Co-PI for several funded grants from NSF.
Topic: Design and Implementation for 5G Baseband Processing
Abstract: This tutorial focuses on Advanced Baseband Processing Circuits and Systems for 5G Communications: an emerging research field enabling 5G from theory to practice. By committing itself to the emerging techniques of baseband processing circuits and systems for 5G, this tutorial means to bring a synthesized source and wide view of recent progress and existing challenges in this particular but very important research area, including: 1) algorithm and code construction for 5G baseband processing; 2) algorithm and implementation co-design; 3) architecture and implementation optimization for 5G baseband; and 4) artificial intelligence (AI) for 5G baseband. The tutorial will identify technical challenges and recent results related to DISPS applications to 5G scenarios such as Internet of Things, Autonomous Vehicles, Robotics and UAVs, and Smart Buildings and Cities.
Chuan Zhang, Southeast University, China
Chuan Zhang is now an associate professor of National Mobile Communications Research Laboratory, School of Information Science and Engineering, Southeast University, Nanjing, China. He received B.E. degree (summa cum laude) in microelectronics and M.E. degree (summa cum laude) in VLSI design from Nanjing University, Nanjing, China, in 2006 and 2009, respectively. He received both M.S.E.E. degree and Ph.D. degree in Department of Electrical and Computer Engineering, University of Minnesota, Twin Cities (UMN), USA, in 2012. His current research interests include low-power high-speed VLSI design for digital signal processing and digital communication, bio-chemical computation and neuromorphic engineering, and quantum communication. Dr. Zhang is a member of Seasonal School of Signal Processing (S3P) and Design and Implementation of Signal Processing Systems (DISPS) TC of the IEEE Signal Processing Society; Circuits and Systems for Communications (CASCOM) TC, VLSI Systems and Applications (VSA) TC, and Digital Signal Processing (DSP) TC of IEEE Circuits and Systems Society. He serves as the Secretary of the 7th Committee on Science and Technology – Information Division, Ministry of Education, China.
Dr. Zhang received the Excellent Bachelor Dissertation Award of Nanjing University in 2006, and the Excellent Master Dissertation Award of Jiangsu Province in 2009. He received the Three-Year University-Wide Graduate School Fellowship of UMN in 2009, and Doctoral Dissertation Fellowship of UMN in 2012. He has been selected by the first Innovative and Entrepreneurial Doctoral Talent Program of Jiangsu Province in 2014, Outstanding Young Faculty Teaching and Research Support Program of Southeast University in 2016, and the first Young Scientific Talent Lift Program of Jiangsu Province in 2017. He received the Leike Excellence in Teaching Award of Southeast University in 2016, the Qingyun Sun Excellence in Teaching Award of Southeast University in 2017, and the University-Wide Excellence in Teaching Award of Southeast University in 2017.
He is also a (co-)recipient of Best Paper Award of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) in 2016, Best (Student) Paper Award of IEEE International Conference on Digital Signal Processing (DSP) in 2016, (three) Excellent Paper Awards and Excellent Poster Presentation Award of International collaboration Symposium on Information Production and Systems (ISIPS) in 2016 and 2017, (two) Best (Student) Paper Awards of IEEE International Conference on ASIC (ASICON) in 2015 and 2017, the Best Paper Award Nomination of IEEE Workshop on Signal Processing Systems (SiPS) in 2015, Excellent Master Dissertation Nomination of the Chinese Institute of Electronics in 2017, Excellent Master Dissertation Award of Jiangsu Province in 2009, (three) Excellent Bachelor Dissertation Award of Jiangsu Province in 2015 and 2016, (seven) Excellent Bachelor Dissertation Award of Southeast University in 2015 and 2016, (two) Excellent Bachelor Dissertation Award of Nanjing University in 2015 and 2016, the Merit (Student) Paper Award of IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) in 2008.
Xiaosi Tan, Southeast University, ChinaXiaosi Tan is currently research fellow in National Mobile Communications Research Laboratory, School of Information Science and Engineering, Southeast University, Nanjing, China. She received the B.S. degree in applied mathematics from Beijing University of Technology, Beijing, China, in 2009, and the Ph.D. degree in mathematics from Texas A&M University, College Station, Texas, USA, in 2015. Her current research interests include emerging technologies for 5G cellular networks, including machine learning for wireless networks, massive MIMO and massive MTC communications.
Topic: Large Signal and Small Signal Analysis in Analog Design
Abstract: Large signal and small signal responses are two closely related aspects of an analog system. These two characteristics usually correspond to circuits’ nonlinearity and stability, respectively. They are the main concerns of designing circuits in signal chain. By expanding the transfer function f(x) of an analog system into Taylor series, the first term is the DC operating point, the second term is the linear term concerned with the small signal analysis, while the other high order terms are nonlinear terms which can be investigated by large signal analysis.
Jinda Yang, 3PEAK INC., China
Jinda Yang received bachelor degree from USTC (University of Science and Technology of China) in 2007 and master degree from Fudan University in 2011. He worked at HiSilicon for over 7 years, where he design high performance ADC for wireless base station and ultrahigh speed ADC for ODSP. He holds 10 Chinese patents and 4 US patents in the ADC field.